A Advance Material for High Reliability & High Layer Count Printed Circuit Boards

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A Advance Material for High Reliability & High Layer Count Printed Circuit Boards

Time: 2016-02-08 09:37:51 Source by: www.gladsmt.com

A Advance Material for High Reliability & High Layer Count Printed Circuit Boards

Over the past few years a new family of laminate systems has been developed to face the increasing physical demands of withstanding Pb-free soldering processes used in the assembly of RoHS compliant products. Many of the materials have been found to perform satisfactorily for consumer type products where reflow temperatures peak around 245°C. However the high end PWB designs for the telecommunications and IT equipments typically tend to be more complex, thicker and therefore have a much higher thermal mass than consumer products. In order to apply sufficient heat to enable satisfactory solder reflow of surface mounted devices, the temperature of the printed wiring board can peak at up to 260°C. Add to that the complexity of the board (typically double side assembled) and the requirement to be able to repair boards, then it is highly possible that boards throughout their manufacturing cycle could see up to 5 thermal excursions up to this 260°C level withstanding 20~30 seconds over 255°C. The ability of laminate systems to withstand the combined thermal e xposure without degradation or delamination and at the same time exhibiting consistent electrical properties is essential.

To meet the demand, a novel thermoplastic resin modified multifunctional epo xy system material has been developed. Silica fillers have been carefully selected for ensuring the lower CTE. The material shows an outstanding heat resistance, reliab ility and toughness performance with complex BGA design (Pitch 0.8mm, through hole d iameter 0.25mm) on thicker (Thickness: 4mm PTH board and 3.2mm HDI board) PW B board comparing with currently available Pb -Free compatible materials. The dielectric properties and other properties of this material will be presented.

With the advent of Pb-free printed circuit board assembly soldering, the laminate integrity of the Pb-free materials after Pb-free assembly was significantly better than two years ago, showing that the materials industry are learning and maturing relative to materials ability to survive multiple cycles through Pb-free assembly. Many of the materials have been found to perform satisfactorily for consumer type products where reflow temperatures peak around 245°C level withstanding 90 seconds over 217 °C. However the high end PW B designs for the telecommunications and IT equipments typically tend to be more complex, thicker and therefore have a much higher thermal mass than consumer products. In order to apply sufficient heat to enable satisfactory solder reflow of surface mounted devices, the temperature of the printed wiring board can peak at up to 260°C. Add to that the complexity of the board (typically double side assembled) and the requirement to be able to repair boards, then it is highly possible that boards throughout their manufacturing cycle could see up to 5 thermal e xcurs ions up to this 260°C level withstanding 20~30 seconds over 255°C, and withstanding 120~150 seconds over 217°C. The ability of laminate systems to withstand the combined thermal e xposure without degradation or delamination and at the same t ime exhibiting consistent electrical properties is essential.

Heat resistance test Board
The PTH and HDI with 3 different thickness printed circuit board design used for this heat resistance study are shown in Table 1. The BGA coupons are having 0.35mm (.014 inch) and 0.30mm (.012inch) diameter drilled via holes. Three coupons have 1mm (.040 inch) and 0.8mm (.032 inch) via to via spacing and one coupon has a 0.65mm (.026 inch) via to via spacing. The Thermal via coupons are having 0.35mm (.014 inch) and 0.30mm (.012inch) diameter drilled via holes. Three coupons have 1mm (.040 inch) and 0.8mm (.032 inch) via to via spacing and one coupon has 0.65mm (.026 inch) via to via spacing. There are 20 hole X 20 hole array f BGA and 10 hole X 10 hole array for thermal via

Table 1 -Test coupon design

	PTH Test board				HDI Test board
Layers	24L		20L		24 layers
Thickness	4.0mm		3.0mm		3.2mm
	BGA zone				BGA zone
BGA Pitch	1.0mm	0.8mm	1.0mm	0.8mm	1.0mm	0.8mm	0.65mm
Drill Diameter	0.35mm	0.35mm	0.30mm	0.30mm	0.30mm	0.30mm	0.30mm
BGA inner layer pad	6mil
BGA line	20 hole X 20 hole array				20 hole X 20 hole array
	Thermal via zone				Thermal via zone
Thermal via Pitch	1.0mm	0.8mm	1.0mm	0.8mm	1.0mm	0.8mm	0.65mm
Drill Diameter	0.35mm	0.35mm	0.30mm	0.30mm	0.30mm	0.30mm	0.30mm
Thermal via zone	10 hole X 10 hole array				10 hole X 10 hole array
Thermal via zone copper layer	3,4,7,8,17,18,21,22 layers are without copper, and other layers are full of copper		3,4,8,17,18,layers are without copper, and other layers are full of copper		12, 16 layers are full of copper

Material Stack-ups
For the 24 layer PTH test board constructions, the standard resin content constructions are used, measuring 4.00 mm (0.158 inches) in overall thickness as Figure 1 24 layers PTH test board.

For the 24 layer HDI test board constructions, the high resin content constructions are used, measuring 3.20 mm (0.126 inches) in overall thickness as Figure 2 24 layers HDI test board.

Materials properties

Table 2 –Material properties

Item	Test condition	Unit	The Novel Material	Std High-Tg FR-4
Tg	DMA	℃	200	180
Tg	TMA	℃	170	160
Td	TGA(10℃/min)	℃	355	340
Peel Strength	A (1oz)	N/mm	1.46	1.25
Peel Strength	288℃/10s	N/mm	1.44	1.0~1.2
Dk	1.1GHz (46%)		4.5	4.5
Df	1.1GHz (46%)		0.016	0.020
Z-CTE	< Tg	ppm/℃	43	60
	> Tg	ppm/℃	210	260
	50~260 ℃	%	2.30%	3.00%
T288	TMA	min	45	15
PCT	288℃/10s	cycle	105kPa/ 5h >10	105kPa/ 3h Fail
Heat resistance after Moisture absorption	Solder dip @288℃/10s	cycle	C-168/85/85 >10	C-120/85/85 Fail
Elastic Modulus		Gpa	24	20
Moisture absorption	E-2/125+C-168/85/85	%	0.42	>0.5

Board Preconditioning – Simulated Pb-free Assembly
Preconditioning profile used the parameters as follows:
1.Time above 217℃ Liquidus: Target 120 to 150 seconds
2.Target Peak Temperature: 260°C Minimum +5°C / -0°C
Time within 5°C of Max Peak Temp.:20~30 seconds

Boards were not baked prior to reflow. After each cycle through the reflow oven each panel was visually inspected to determine if surface material delamination was present. Table 3 provides an overview of the results of traditional cross-sections completed after both 3X reflow at 260°C and 5X reflow at 260°C

Table 3- Cross-section check

Test condition		Lead free reflow 3 times				Lead free reflow 5 times
Pitch(mm)		BGA		Thermal via		BGA		Thermal via
Layer counts	Materials	1.0	0.8	1.0	0.8	1.0	0.8	1.0	0.8
24 Layers	High Tg FR-4 A	Pass	Delam	Pass	40% Pass	40% Pass	Delam	Pass	Delam
	High Tg FR-4 B	Pass	Delam	Pass	Delam	Delam	Delam	60% Pass	Delam
	High Tg FR-4 C	Pass	Delam	Pass	Delam	20% Pass	Delam	80% Pass	40% Pass
	High Tg FR-4 D	Pass	Delam	Pass	Delam	Delam	Delam	Pass	Delam
	The Novel Material	Pass	Pass	Pass	Pass	Pass	Pass	Pass	Pass

*Pass- No delamination

*Delam-Delamination

The novel material have passed the severe lead free reflow 5 without any defect indicated the excellent heat resistance property.

The novel material could pass the severe lead free reflow 5 time without any typically defects which happens on High Tg FR-4 as

delamination inside core or between prepregs, cigar voids, hole wall separation, eye-browing crack. Cross sections of the novel materia

Dielectric properties

Table 4- Dielectric properties

The Novel Material layup and

Dk(1.1GHz)

Df(1.1GHz)

Test Method

0.20mm 1X7628 48%

4.5

0.016

IPC-TM-650 2.5.5.5 SPDR

0.20mm 2X3313 56%

4.2

0.015

IPC-TM-650 2.5.5.5 SPDR

As the test result above, the novel material is a std loss material.

Summary
A advance thermoplastic resin modified multifunctional epo xy system material has been developed. The material shows an outstanding heat resistance, reliab ility and toughness performance with complex BGA design (Pitch 0.8mm, through hole diameter 0.25mm) on thicker (Thickness: 4mm PTH board and 3.2mm HDI board) PW B board comparing with currently available Pb-Free compatible materials. The dielectric properties of this novel would able to get Dk 4.2 and Df 0.015 under 1GHz by SPDR method.

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